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| A426316B Series Preliminary Document Title 64K X 16 CMOS DYNAMIC RAM WITH EDO PAGE MODE Revision History Rev. No. 0.0 64K X 16 CMOS DYNAMIC RAM WITH EDO PAGE MODE History Initial issue Issue Date November 15, 2000 Remark Preliminary PRELIMINARY (November, 2000, Version 0.0) AMIC Technology, Inc. A426316B Series Preliminary Features n Organization: 65,536 words X 16 bits n Part Identification: - A426316B - A426316B-L (with self-refresh mode) n High speed - 30/35/40 ns RAS access time - 16/18/20 ns column address access time - 10/11/12 ns CAS access time n Low power consumption - Operating: 75mA (-30 max) - Standby: 3 mA (TTL) Separate CAS ( UCAS , LCAS ) for byte selection Self refresh mode 256 refresh cycles, 4 ms refresh interval Read-modify-write, RAS -only, CAS -before- RAS , Hidden refresh capability n TTL-compatible, three-state I/O n JEDEC standard packages - 400mil, 40-pin SOJ - 400mil, 40/44 TSOP type II package n Single 5V power supply/built-in VBB generator n n n n 64K X 16 CMOS DYNAMIC RAM WITH EDO PAGE MODE Pin Configuration n SOJ n TSOP Pin Descriptions Symbol VCC I/O0 I/O1 I/O2 I/O3 VCC I/O4 I/O5 I/O6 I/O7 NC NC WE RAS NC A0 A1 A2 A3 VCC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 VSS I/O15 I/O14 I/O13 I/O12 VSS I/O11 I/O10 I/O9 I/O8 NC LCAS UCAS OE NC A7 A6 A5 A4 VSS VCC I/O0 I/O1 I/O2 I/O3 VCC I/O4 I/O5 I/O6 I/O7 NC NC WE RAS NC A0 A1 A2 A3 VCC 1 2 3 4 5 6 7 8 9 10 13 14 15 16 17 18 19 20 21 22 44 43 42 41 40 39 38 37 36 35 32 31 30 29 28 27 26 25 24 23 VSS I/O15 I/O14 I/O13 I/O12 VSS I/O11 I/O10 I/O9 I/O8 NC LCAS UCAS OE NC A7 A6 A5 A4 VSS Description Address Inputs Data Input/Output Row Address Strobe Column Address Strobe/Upper Byte Control Column Address Strobe/Lower Byte Control Write Enable Output Enable +5V Power Supply Ground No Connection A0 - A7 I/O0 - I/O15 RAS PRELIMINARY A426316BS (November, 2000, Version 0.0) A426316BV UCAS LCAS WE OE VCC VSS NC 1 AMIC Technology, Inc. A426316B Series Selection Guide Symbol tRAC tAA tCAC tOEA tRC tPC ICC1 ICC6 Description Maximum RAS Access Time Maximum Column Address Access Time Maximum CAS Access Time Maximum Output Enable ( OE ) Access Time Minimum Read or Write Cycle Time Minimum EDO Page Mode Cycle Time Maximum Operating Current Maximum CMOS Standby Current -30 30 16 10 10 65 12 95 2 -35 35 18 11 11 70 14 85 2 -40 40 20 12 12 75 15 75 2 Unit ns ns ns ns ns ns mA mA Functional Description The A426316B is a high performance CMOS Dynamic Random Access Memory organized as 65,536 words X 16 bits. The A426316B is fabricated with advanced CMOS technology and designed with innovative design techniques resulting in high speed, extremely low power and wide operating margins at component and system levels. The A426316B features a high speed page mode operation in which high speed read, write and read-write are performed on any of the bits defined by the column address. The asynchronous column address uses an extremely short row address capture time to ease the system level timing constraints associated with multiplexed addressing. Output is tri-stated by a column address strobe ( UCAS and LCAS ) which acts as an output enable independent of RAS . Very EDO UCAS and LCAS to output access time eases system design. All inputs are TTL compatible. EDO Page Mode operation allows random access up to 256 X 16 bits within a page, with cycle time as short as 12/14/15 ns. The A426316B is best suited for graphics, digital signal processing and high performance peripherals. The A426316B is available in JEDEC standard 40-pin plastic SOJ package and 40/44 TSOP type II package. PRELIMINARY (November, 2000, Version 0.0) 2 AMIC Technology, Inc. A426316B Series Block Diagram I/O15 I/O14 I/O13 I/O12 I/O11 I/O10 I/O9 I/O8 VCC VSS REFRESH CONTROLLER Y0 - Y7 COLUMN DECODER SENSE AMP UPPER BYTE DATA I/O BUFFER 256 X 16 LOWER BYTE DATA I/O BUFFER A0 RAS RAS CLOCK GENERATOR A1 A2 A3 A4 A5 UCAS UCAS CLOCK GENERATOR A6 A7 ADDRESS BUFFERS ROW DECODER 256 256 X 256 X 16 ARRAY X0 - X7 I/O7 I/O6 I/O5 I/O4 I/O3 I/O2 I/O1 I/O0 LCAS LCAS CLOCK GENERATOR WE WE CLOCK GENERATOR OE OE CLOCK GENERATOR SUBSTRATE BIAS GENERATOR Recommended Operating Conditions Symbol VCC VSS VIH VIL Input Voltage Description Supply Voltage (Ta = 0C to +70C) Min. 4.5 0.0 2.4 -1.0 Typ. 5.0 0.0 Max. 5.5 0.0 VCC + 1 0.8 Unit V V V V PRELIMINARY (November, 2000, Version 0.0) 3 AMIC Technology, Inc. A426316B Series Truth Table Function Standby Read: Word Read: Lower Byte RAS UCAS H L H LCAS H L L WE OE Address X Row/Col. Row/Col. I/Os High-Z Data Out I/O0-7 = Data Out I/O8-15 = High-Z I/O0-7 = High-Z I/O8-15 = Data Out Data In I/O0-7 = Data In I/O8-15 = X I/O0-7 = X I/O8-15 = Data In Data Out Data In Data Out Data Out Data In Data In Data In Data In Data Out Data In High-Z High-Z High-Z High-Z Notes H L L X H H X L L Read: Upper Byte L L H H L Row/Col. Write: Word(Early) Write: Lower Byte(Early) L L L H L L L L X X Row/Col. Row/Col. Write: Upper Byte(Early) L L H L X Row/Col. Read-Write EDO-Page-Mode Read: Hi-Z -First cycle -Subsequent Cycles EDO-Page-Mode Write(Early) -First cycle -Subsequent Cycles EDO-Page-Mode Read-Write -First cycle -Subsequent Cycles Hidden Refresh Read Hidden Refresh Write RAS -Only Refresh L L L L L L L LHL LHL L HL HL L HL HL HL HL HL HL L L H L L L HL HL HL HL HL HL L L H L L HL H H L L HL HL H L X X X LH HL HL X X LH LH L X X X X Row/Col. Row/Col. Col. Row/Col. Col. Row/Col. Col. Row/Col. Row/Col. Row X X 1.2 2 2 1 1 1, 2 1, 2 2 1 CBR Refresh Self Refresh (L-ver only) Note: 3 1. Byte Write may be executed with either UCAS or LCAS active. 2. Byte Read may be executed with either UCAS or LCAS active. 3. Only one CAS signal ( UCAS or LCAS ) must be active. PRELIMINARY (November, 2000, Version 0.0) 4 AMIC Technology, Inc. A426316B Series Absolute Maximum Ratings* Input Voltage (Vin) . . . . . . . . . . . . . . . . . . . -1.0V to +7.0V Output Voltage (Vout) . . . . . . . . . . . . . . . . -1.0V to +7.0V Power Supply Voltage (VCC) . . . . . . . . . . -1.0V to +7.0V Operating Temperature (TOPR) . . . . . . . . . . 0C to +70C Storage Temperature (TSTG) . . . . . . . . . -55C to +150C Soldering Temperature X Time (TSLODER) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260C X 10sec Power Dissipation (PD) . . . . . . . . . . . . . . . . . . . . . . . . 1W Short Circuit Output Current (Iout) . . . . . . . . . . . . . 50mA Latch-up Current . . . . . . . . . . . . . . . . . . . . . . . . . . 200mA *Comments Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to this device. These are stress ratings only. Functional operation of this device at these or any other conditions above those indicated in the operational sections of these specification is not implied or intended. Exposure to the absolute maximum rating conditions for extended periods may affect device reliability. DC Electrical Characteristics (VCC = 5V 10%, VSS = 0V, Ta = 0C to +70C) Symbol Parameter Min. IIL IOL ICC1 Input Leakage Current Output Leakage Current Operating Current -10 -10 -30 Max. +10 +10 95 Min. -10 -10 -35 Max. +10 +10 85 Min. -10 -10 -40 Max. +10 +10 75 A A mA 0V Vin +5.5V Pins not under test = 0V DOUT disabled, 0V Vout +5.5V Unit Test Conditions Notes RAS , UCAS , LCAS Address cycling tRC = min. 1, 2 ICC2 TTL Standby Power Supply Current Refresh Current ( RAS only Refresh) - 3 - 3 - 3 mA RAS = CAS VIH All other inputs VSS RAS cycling, 1 ICC3 - 95 - 85 - 75 mA UCAS = LCAS = VIH, tRC = min. 95 85 75 mA ICC4 EDO Page Mode Current RAS = VIL, 1, 2 UCAS , LCAS Address cycling tPC = min. 95 85 75 mA ICC5 Refresh Current ( CAS -before- RAS , UCAS , LCAS cycling tRC = min. 1 RAS Refresh ) ICC6 CMOS Standby Power Supply Current Self Refresh Mode Current Output High Voltage Output Low Voltage 2 3 2 3 2 3 mA mA RAS = CAS VCC - 0.2V All other inputs VSS RAS = CAS VSS + 0.2V All other inputs VSS IOUT = -5.0mA IOUT = 4.2mA ICC7 VOH VOL 2.4 - 0.4 2.4 - 0.4 2.4 - 0.4 V V PRELIMINARY (November, 2000, Version 0.0) 5 AMIC Technology, Inc. A426316B Series AC Characteristics (VCC = 5V 10%, VSS = 0V, Ta = 0C to +70C) Std Symbol -30 Parameter Min. 1 2 3 4 5 6 7 8 9 10 11 tRC tRP tRAS tCAS tRCD tRAD tRSH tCSH tCRP tASR tRAH tT tREF 12 13 14 15 16 17 tCLZ tRAC tCAC tAA tAR tRCS Random Read or Write Cycle Time RAS Precharge Time RAS Pulse Width CAS Pulse Width RAS to CAS Delay Time RAS to Column Address Delay Time CAS to RAS Hold Time CAS Hold Time CAS to RAS Precharge Time -35 Min. 70 25 35 6 16 11 10 35 5 0 6 2 0 28 0 Max. 75K 24 17 50 4 35 11 18 Min. 75 25 40 7 17 12 10 40 5 0 7 2 0 30 0 -40 Unit Notes Max. 75K 28 20 52 4 40 12 20 ns ns ns ns ns ns ns ns ns ns ns ns ms ns ns ns ns ns ns 4, 5 3 8 6,7 6, 13 7, 13 6 7 # Max. 75K 20 14 50 4 30 10 16 - 65 25 30 5 15 10 10 30 5 0 5 2 0 26 0 Row Address Setup Time Row Address Hold Time Transition Time (Rise and Fall) Refresh Period CAS to Output in Low Z Access Time from RAS Access Time from CAS Access Time from Column Address Column Address Hold Time from RAS Read Command Setup Time PRELIMINARY (November, 2000, Version 0.0) 6 AMIC Technology, Inc. A426316B Series AC Characteristics (continued) (VCC = 5V 10%, VSS = 0V, Ta = 0C to +70C) Std Symbol -30 Parameter Min. 18 19 tRCH tRRH Read Command Hold Time Read Command Hold Time Reference to RAS Column Address to RAS Lead Time Output Hold After CAS Low Output Disable Setup Time Output Buffer Turn-Off Delay Time Column Address Setup Time Column Address Hold Time RAS Precharge Setup Time -35 Min. 0 0 Max. Min. 0 0 -40 Unit Notes Max. ns ns 9 9 # Max. - 0 0 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 tRAL tCOH tODS tOFF tASC tCAH tRPS tWCS tWCH tWCR tWP tRWL tCWL tDS tDH tDHR tRMW tRWD 16 5 0 0 0 5 50 0 5 26 5 10 10 0 5 26 100 50 6 - 18 5 0 0 0 5 60 0 5 28 5 11 11 0 5 28 105 54 6 - 20 5 0 0 0 5 70 0 5 30 5 12 12 0 5 30 100 58 6 - ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns 11 12 12 11 11 8, 10 Write Command Setup Time Write Command Hold Time Write Command Hold Time to RAS Write Command Pulse Width Write Command to RAS Lead Time Write Command to CAS Lead Time Data-in setup Time Data-in Hold Time Data-in Hold Time to RAS Read-Modify-Write Cycle Time RAS to WE Delay Time (Read-Modify-Write) PRELIMINARY (November, 2000, Version 0.0) 7 AMIC Technology, Inc. A426316B Series AC Characteristics (continued) (VCC = 5V 10%, VSS = 0V, Ta = 0C to +70C) Std Symbol -30 Parameter Min. 38 tCWD CAS to WE Delay Time (Read-Modify-Write) -35 Min. 28 Max. Min. 30 -40 Unit Notes Max. ns 11 # Max. - 26 39 40 41 tAWD tRASS tCPN Column Address to WE Delay Time (Read-Modify-Write) RAS Pulse Width (Self Refresh Mode) CAS Precharge Time ( CAS before RAS ) 32 300 10 100K 35 300 10 100K 35 300 10 100K ns s ns 11 42 43 tPC tCPA Read or Write Cycle Time (EDO Page) Access Time from CAS Precharge (EDO Page) CAS Precharge Time (EDO Page) 12 - 19 14 - 21 15 - 23 ns ns 14 13 44 45 46 tCP tPRM tCRW 3 56 - 44 4 58 - 46 5 60 - 48 ns ns ns EDO Page Mode RMW Cycle Time EDO Page Mode CAS Pulse Width (RMW) RAS Pulse Width (EDO Page) CAS Setup Time ( CAS -before- RAS ) CAS Hold Time ( CAS -before- RAS ) RAS to CAS Precharge Time ( CAS -before- RAS ) RAS Hold Time Reference to OE OE Access Time OE to Data Delay 47 48 49 50 tRASP tCSR tCHR tRPC 30 0 7 0 75K - 35 0 8 0 75K - 40 0 8 0 75K - ns ns ns ns 3 3 51 52 53 54 tROH tOEA tOED tOEZ 6 5 0 10 5 7 5 0 11 6 8 5 0 12 6 ns ns ns ns 8 Output Buffer Turn-off Delay from OE PRELIMINARY (November, 2000, Version 0.0) 8 AMIC Technology, Inc. A426316B Series AC Characteristics (continued) (VCC = 5V 10%, VSS = 0V, Ta = 0C to +70C) Std Symbol -30 Parameter Min. 55 56 tOEH tCPT OE Command Hold Time CAS Precharge Time ( CAS -before- RAS Counter Test) -35 Min. 10 20 Max. Min. 10 20 -40 Unit Notes Max. ns ns # Max. - 10 20 Notes: ICC1, ICC3, ICC4, and ICC5 depend on cycle rate. ICC1 and ICC4 depend on output loading. Specified values are obtained with the outputs open. An initial pause of 200s is required after power-up followed by any 8 RAS cycles before proper device operation is achieved. In the case of an internal refresh counter, a minimum of 8 CAS -before- RAS initialization cycles instead of 8 RAS cycles are required. 8 initialization cycles are required after extended periods of bias without clocks (greater than 8ms). 4. AC Characteristics assume tT = 3ns. All AC parameters are measured with a load equivalent to one TTL loads and 50pF, VIL (min.) GND and VIH (max.) VCC. 5. VIH (min.) and VIL (max.) are reference levels for measuring timing of input signals. Transition times are measured between VIH and VIL. 6. Operation within the tRCD (max.) limit insures that tRAC (max.) can be met. tRCD (max.) is specified as a reference point only. If tRCD is greater than the specified tRCD (max.) limit, then access time is controlled exclusively by tCAC. 7. Operation within the tRAD (max.) limit insures that tRAC (max.) can be met. tRAD (max.) is specified as a reference point only. If tRAD is greater than the specified tRAD (max.) limit, then access time is controlled exclusively by tAA. 8. Assumes three state test load (5pF and a 380 Thevenin equivalent). 9. Either tRCH or tRRH must be satisfied for a read cycle. 10. tOFF (max.) defines the time at which the output achieves the open circuit condition; it is not referenced to output voltage levels. 11. tWCS, tWCH, tRWD, tCWD and tAWD are not restrictive operating parameters. They are included in the data sheet as electrical characteristics only. If tWCS tWCS (min.) and tWCH tWCH (min.), the cycle is an early write cycle and data-out pins will remain open circuit, high impedance, throughout the entire cycle. If tRWD tRWD (min.) , tCWD tCWD (min.) and tAWD tAWD (min.), the cycle is a read-modify-write cycle and the data out will contain data read from the selected cell. If neither of the above conditions is satisfied, the condition of the data out at access time is indeterminate. 12. These parameters are referenced to UCAS and LCAS leading edge in early write cycles and to WE leading edge in read-modify-write cycles. 13. Access time is determined by the longer of tAA or tCAC or tCPA. 14. tASC tCP to achieve tPC (min.) and tCPA (max.) values. 15. These parameters are sampled and not 100% tested. 1. 2. 3. PRELIMINARY (November, 2000, Version 0.0) 9 AMIC Technology, Inc. A426316B Series Word Read Cycle tRC(1) tRAS(3) tRP(2) RAS tCSH(8) tCRP(9) tRCD(5) tRSH(7) tCAS(4) tCRP(9) UCAS LCAS tRAD(6) tASR(10) tRAH(11) tASC(24) tRAL(20) tCAH(25) A0 ~ A7 Row Address tAR(16) Column Address tRCH(18) tRRH(19) tRCS(17) WE tROH(51) tOEA(52) OE tCAC(14) tAA(15) tRAC(13) tOFF(23) tOEZ(54) I/O0 ~ I/O15 High-Z tCLZ(12) Valid Data-out : High or Low PRELIMINARY (November, 2000, Version 0.0) 10 AMIC Technology, Inc. A426316B Series Word Write Cycle (Early Write) tRC(1) tRAS(3) tRP(2) RAS tCSH(8) tCRP(9) tRCD(5) tRSH(7) tCAS(4) tCRP(9) UCAS LCAS tAR(16) tRAD(6) tASR(10) tRAH(11) tASC(24) tRAL(20) tCAH(25) A0 ~ A7 Row Address Column Address tWCR(29) tCWL(32) tRWL(31) tWP(30) WE tWCS(27) tWCH(28) OE tDHR(35) tDS(33) tDH(34) I/O0 ~ I/O15 Valid Data-in : High or Low PRELIMINARY (November, 2000, Version 0.0) 11 AMIC Technology, Inc. A426316B Series Word Write Cycle (Late Write) tRC(1) tRAS(3) tRP(2) RAS tCSH(8) tCRP(9) tRCD(5) tRSH(7) tCAS(4) tCRP(9) UCAS LCAS tAR(16) tRAD(6) tASR(10) tRAH(11) tASC(24) tRAL(20) tCAH(25) A0 ~ A7 Row Address Column Address tCWL(32) tRWL(31) tWCR(29) tWP(30) WE tOEH(55) tOED(54) OE tDHR(35) tDS(33) tDH(34) I/O0 ~ I/O15 High-Z Vaild Data-in : High or Low PRELIMINARY (November, 2000, Version 0.0) 12 AMIC Technology, Inc. A426316B Series Word Read-Modify-Write Cycle tRWC(36) tRAS(3) tRP(2) RAS tCSH(8) tCRP(9) tRCD(5) tRSH(7) tCAS(4) tCRP(9) UCAS LCAS tAR(16) tRAD(6) tASR(10) tRAH(11) tASC(24) tCAH(25) A0 ~ A7 Row Address Column Address tAWD(39) tRCS(17) tRWD(37) tCWD38) tCWL(32) tRWL(31) WE tOED(53) tOEA(52) tOEZ(54) tWP(30) OE tCAC(14) tAA(15) tRAC(13) tDS(33) tOEH(55) tDH(34) I/O0 ~ I/O15 High-Z Data-out tCLZ(12) Data-in : High or Low PRELIMINARY (November, 2000, Version 0.0) 13 AMIC Technology, Inc. A426316B Series EDO Page Mode Word Read Cycle tRASP(47) tRP(2) RAS tCSH(8) tCRP(9) tRCD(5) tCAS(4) tCP(44) tPC(42) tCAS(4) tRSH(7) tCRP(9) tCAS(4) UCAS LCAS tRAD(6) tRAH(11) tCSH(8) tAR(16) tASR(10) tCAH(25) tASC(24) tRAL(20) tCAH(25) tASC(24) A0 ~ A7 Row Column tCAH(25) tRCS(17) Column tRCS(17) tRCH(25) Column tRCS(17) tRCH(25) WE tAA(15) tCPA(43) tOEA(52) tOEA(52) tOES(26) tCAC(14 tCAC(14) tCLZ(12) ) tAA(15) tRRH(19) OE tRAC(13) tOEP(41) tCAC(14) tOEZ(54) tOFF(23) tOEZ(54) tCOH(21) I/O0 ~ I/O15 Data-out Data-out Data-out tCLZ(12) : High or Low PRELIMINARY (November, 2000, Version 0.0) 14 AMIC Technology, Inc. A426316B Series EDO Page Mode Early Word Write Cycle tRASP(47) tRP(2) RAS tCSH(8) tCRP(9) tRCD(5) tCAS(4) tCP(44) tCAS(4) tCP(44) tCAS(4) tPC(42) tRSH(7) tCRP(9) UCAS LCAS tRAL(20) tRAD(6) tASR(10) tRAH(11) tASC(24) tCAH(25) tASC(24) tCAH(25) tASC(24) tCAH(25) A0 ~ A7 Row Column tCWL(32) tWCS(27) tWCS(27) tWCH(28) Column tCWL(32) tWCS(27) tWCH(28) Column tCWL(32) tRWL(31) tWCH(28) WE tWP(30) tWP(30) tWP(30) OE tDH(34) tDS(33) tDS(33) tDH(34) tDS(33) tDH(34) I/O0 ~ I/O15 Data-in Data-in Data-in : High or Low PRELIMINARY (November, 2000, Version 0.0) 15 AMIC Technology, Inc. A426316B Series EDO Page Mode Word Read-Modify-Write Cycle tRP(2) tRASP(47) RAS tCSH(8) tCRP(9) tRCD(5) tCAS(4) tCP(44) tCAS(4) tCP(44) tCAS(4) tPCM(45) tRSH(7) tCRP(9) UCAS LCAS tRAD(6) tASR(10) tRAH(11) tCAH(25) tASC(24) tCAH(25) tASC(24) tRAL(20) tCAH(25) tASC(24) A0 ~ A7 Row Column Column tCWL(32) Column tCWL(32) tCWL(32) tRWL(31) tRWD(37) tRCS(17) tCWD(38) tCWD(38) tCWD(38) WE tWP(30) tAWD(39) tAWD(39) tWP(30) tAWD(39) tROH(51) tOEA(52) tOEA(52) tOEH(55) tOED(53) tCAC(14) tAA(15) tOEZ(54) tRAC(13) tDH(34) tDS(33) tCPA(43) tAA(15) tOEZ(54) tDH(34) tDS(33) tOED(53) tCPA(43) tAA(15) tOEZ(54) tDH(34) tDS(33) tOED(53) tOEA(52) tWP(30) OE I/O0 ~ I/O15 High-Z tCLZ(12) tCLZ(12) tCLZ(12) Data-in Data-out Data-out Data-in Data-out Data-in : High or Low PRELIMINARY (November, 2000, Version 0.0) 16 AMIC Technology, Inc. A426316B Series RAS Only Refresh Cycle tRC(1) tRAS(3) tRP(2) RAS tRPC(50) tCRP(9) UCAS LCAS tASR(10) tRAH(11) A0 ~ A7 Row Note: WE, OE = Don't care. : High or Low CAS Before RAS Refresh Cycle tRC(1) tRP(2) tRAS(3) tRP(2) RAS tRPC(50) tCPN(41) tCSR(48) tCHR(49) UCAS LCAS tOFF(23) I/O0 ~ I/O15 High-Z Note: WE, OE, A0 ~ A7 = Don't care. : High or Low PRELIMINARY (November, 2000, Version 0.0) 17 AMIC Technology, Inc. A426316B Series Timing Waveform of CAS -before- RAS Refresh Counter Test Cycle tRAS (3) RAS tRSH (7) tRP (2) tCSR (48) CAS tCHR (49) tCPT (56) tCAS (4) tRAL (20) tCAH (25) Address Col Address tAA (15) tCAC (14) tCLZ (12) I/O tRCS (17) Read Cycle WE Data Out tRRH (19) tRCH (18) tOFF (23) tOEA (52) OE tRWL(31) tCWL(32) tWP(30) tWCH(28) tROH (53) tWCS(27) WE Write Cycle tDS (33) I/O tDH (34) Data In OE tRCS (17) WE tAWD(39) tCWD(38) tWP (30) tCWL(32) Read-Write Cycle tOEA(52) OE tAA (15) tCLZ (12) tCAC (14) I/O Data Out tOED (53) tOEZ(54) tDS (33) tDH (34) Data In PRELIMINARY (November, 2000, Version 0.0) 18 AMIC Technology, Inc. A426316B Series Hidden Refresh Cycle (Word Read) tRC(1) tRAS(3) tRP(2) tRAS(3) tRC(1) tRP(2) RAS tAR(16) tCRP(9) tRCD(5) tRSH(7) tCHR(49) tCRP(9) UCAS LCAS tRAD(6) tASR(10) tRAH(11) tASC(24) tRAL(20) tCAH(25) A0 ~ A7 Row Column tRCS(17) tRRH(19) WE tAA(15) OE tCAC(14) tCLZ(12) tRAC(13) tOFF(23) I/O0 ~ I/O15 High-Z Valid Data-out : High or Low PRELIMINARY (November, 2000, Version 0.0) 19 AMIC Technology, Inc. A426316B Series Hidden Refresh Cycle (Early Word Write) tRC(1) tRAS(3) tRP(2) tRAS(3) tRC(1) tRP(2) RAS tAR(16) tCRP(9) tRCD(5) tRSH(7) tCHR(49) tCRP(9) UCAS LCAS tRAD(6) tASR(10) tRAH(11) tASC(24) tRAL(20) tCAH(25) A0 ~ A7 Row tWCS(27) Column tWCH(28) tWP(30) WE OE tDS(33) tDH(34) I/O0 ~ I/O15 Valid Data-in : High or Low PRELIMINARY (November, 2000, Version 0.0) 20 AMIC Technology, Inc. A426316B Series Self Refresh Mode (A426316B-L Only) tPR(2) tRASS(40) tRPS(26) RAS tRPC(50) tCSR(48) tCHS(21) tCRP(9) UCAS LCAS tCPN(41) tASR(10) A0 ~ A7 tOFF(23) ROW COL I/O0 ~ I/O15 High-Z Note: WE, OE = Don't care. : High or Low n Self Refresh Mode. a. Entering the Self Refresh Mode: The A426316B-L Self Refresh Mode is entered by using CAS before RAS cycle and holding RAS and CAS signal "low" longer than 300s. b. Continuing the Self Refresh Mode: The Self Refresh Mode is continued by holding RAS "low" after entering the Self Refresh Mode. It does not depend on CAS being "high" or "low" after entering the Self Refresh Mode continue the Self Refresh Mode. c. Exiting the Self Refresh Mode: The A426316B exits the Self Refresh Mode when the RAS signal is brought "high". PRELIMINARY (November, 2000, Version 0.0) 21 AMIC Technology, Inc. A426316B Series Capacitance15 (f = 1MHz, Ta = Room Temperature, VCC = 5V 10%) Symbol CIN1 CIN2 Signals A0 - A7 RAS , UCAS , Parameter Max. 5 Unit pF pF Test Conditions Vin = 0V Vin = 0V Input Capacitance 7 LCAS , WE , OE CI/O I/O0 - I/O15 I/O Capacitance 7 pF Vin = Vout = 0V Ordering Codes Package\ RAS Access Time 40L SOJ (400 mil) 40/44L TSOP type II (400mil) 40L SOJ (400mil) 40/44L TSOP II (400mil) 30ns A426316BS-30 A426316BV-30 A426316BS-30L A426316BV-30L 35ns A426316BS-35 A426316BV-35 A426316BS-35L A426316BV-35L 40ns A426316BS-40 A426316BV-40 A426316BS-40L A426316BV-40L Self-Refresh No No Yes Yes PRELIMINARY (November, 2000, Version 0.0) 22 AMIC Technology, Inc. A426316B Series Package Information SOJ 40L Outline Dimensions unit: inches/mm 40 21 1 20 D C A2 A A1 S Seating Plane b b1 HE E e y D L e1 Symbol A A1 A2 b1 b C D E e e1 HE L S y Dimensions in inches Min 0.025 0.105 0.026 0.016 0.008 1.020 0.395 0.044 0.355 0.430 0.081 0 Nom 0.110 0.028 0.018 0.010 1.025 0.400 0.050 0.366 0.440 0.093 Max 0.144 0.115 0.032 0.022 0.014 1.030 0.405 0.056 0.376 0.450 0.105 0.050 0.004 10 Dimensions in mm Min 0.64 2.67 0.66 0.41 0.20 25.91 10.03 1.12 9.114 10.92 2.083 0 Nom 2.79 0.71 0.46 0.25 26.04 10.16 1.27 9.383 11.18 2.39 Max 3.66 2.92 0.81 0.56 0.36 26.16 10.29 1.42 9.652 11.43 2.70 1.27 0.10 10 Notes: 1. The maximum value of dimension D includes end flash. 2. Dimension E does not include resin fins. 3. Dimension e1 is for PC Board surface mount pad pitch design reference only. 4. Dimension S includes end flash. PRELIMINARY (November, 2000, Version 0.0) 23 AMIC Technology, Inc. A426316B Series Package Information TSOP 40/44L (Type II) Outline Dimensions 44 unit: inches/mm HE E L L1 1 D A2 A D S B e y Dimensions in inches A1 L L1 Dimensions in mm Min 0.05 0.95 0.32 0.08 18.28 10.03 11.56 0.40 1 Nom 1.00 0.37 0.13 18.41 10.16 0.80 BSC 11.76 0.50 0.80 3 Max 1.20 0.15 1.05 0.42 0.23 18.54 10.29 11.96 0.60 0.90 0.10 5 Symbol A A1 A2 B c D E e HE L L1 S y Min 0.002 0.037 0.013 0.003 0.720 0.395 0.455 0.016 1 Nom 0.039 0.015 0.005 0.725 0.400 0.031 BSC 0.463 0.020 0.031 3 Max 0.047 0.006 0.041 0.017 0.009 0.730 0.405 0.471 0.024 0.035 0.004 5 Notes: 1. The maximum value of dimension D includes end flash. 2. Dimension E does not include resin fins. 3. Dimension S includes end flash. PRELIMINARY (November, 2000, Version 0.0) 24 AMIC Technology, Inc. c |
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